1. Field of the Disclosure
This disclosure relates to processes of forming electronic devices, and more particularly, electronic devices with ultraviolet blocking layers and processes of forming the same.
2. Description of the Related Art
Nonvolatile memory (“NVM”) cells can be erased or otherwise have the charge stored within the NVM cells altered by ultraviolet (“UV”) radiation. When fabricating the NVM cells, UV radiation can be produced during etching. A UV blocking layer can be included within the memory array in an attempt to block UV radiation from reaching the NVM cells.
FIG. 1 includes an illustration of a cross-sectional view of a portion of a workpiece that includes a substrate 100, NVM memory cells, and layers formed over the NVM memory cells 110 and 112. More specifically, the workpiece includes source/drain regions 102, 104, and 106 within the substrate 100. A charge storage stack 120 is formed over the substrates and gate electrodes 124 and 126 overlying the charge storage stack 120. Sidewall spacers 128 lie along opposite sides of the gate electrodes 124 and 126. An interlevel dielectric layer 160 is formed over the gate electrodes 124 and 126 and the charge storage stack 120. The interlevel dielectric layer 160 includes an insulating layer 142 having a thickness of at least 450 nm and is substantially transparent to UV radiation. The interlevel dielectric layer 160 also includes a UV blocking layer 162, another insulating layer 164, and an antireflective layer 166 are formed over the insulating layer 142. The UV blocking layer 162 can include a silicon-rich trichlorosilane nitride. A patterned resist layer 182 is formed over the antireflective layer 166, and the pattern resist layer 182 defines an opening 184.
During a first portion of an etching sequence, a plasma, including reactive ions illustrated as solid-line arrows 192, are directed toward the surface of the workpiece. The reactive ions are affected by an electrical field and travel toward the workpiece in a direction substantially perpendicular to a primary surface of the workpiece. The plasma also generates UV radiation, illustrated as dashed-line arrows 194 in FIG. 1. The UV radiation travels toward the workpiece in a variety of directions; the direction in which UV radiation travels is not affected by the electrical field. The UV radiation is transmitted through the antireflective layer 166 and the insulating layer 164. The UV blocking layer 162 may prevent a substantial portion of the UV radiation from reaching the insulating layer 142 and portions of the workpiece below the insulating layer 142. UV radiation may or may not be transmitted through the patterned resist layer 182.
FIG. 2 includes an illustration of the workpiece later during the etching process sequence after the opening 260 has been formed through the antireflective layer 166, the insulating layer 164, and the UV blocking layer 162. After the UV blocking layer 162 has been patterned, the UV radiation can now pass through the insulating layer 142 and reach the gate electrodes 224 and 126 and the charge storage stack 120 of the memory cells 110 and 112. When the UV radiation reaches the charge storage stack 120, the charge within the charge storage stack 120 can be altered. Because etching through the insulating layer 142 will take a significant amount of time, the charge storage stack 120 can receive a substantial amount of the UV radiation, and thus, change the charge of the charge storage stack 120. Thus, an attempt to reduce problems, mostly UV radiation generated during an etch process, has been unsuccessful in preventing the charge within the charge storage stack 120 from being altered during a contact or via etch process sequence.
Skilled artisans appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the invention.